Switch>sh ver
Cisco IOS Software, C3560 Software (C3560-IPBASE-M), Version 12.2(44)SEB4, RELEASE SOFTWARE (fc1)
Copyright (c) 1986-2005 by Cisco Systems, Inc.
Compiled Tue 30-Aug-05 14:19 by yenanh
ROM: Bootstrap program is C3560 boot loader
BOOTLDR: C3560 Boot Loader (C3560-HBOOT-M) Version 12.2(25r)SEC, RELEASE SOFTWARE (fc4)
Switch uptime is 2 minutes
System returned to ROM by power-on
System image file is "flash:c3560-ipbase-mz.122-44.SEB4/c3560-ipbase-mz.122-44.SEB4.bin"
cisco WS-C3560-24PS (PowerPC405) processor (revision D0) with 118784K/12280K bytes of memory.
Processor board ID CAT1025NMJM
Last reset from power-on
1 Virtual Ethernet interface
24 FastEthernet interfaces
2 Gigabit Ethernet interfaces
The password-recovery mechanism is enabled.
512K bytes of flash-simulated non-volatile configuration memory.
Base ethernet MAC Address : 00:0A:B8:XX:XX:80
Motherboard assembly number : 73-9897-XX
Power supply part number : 341-0097-XX
Motherboard serial number : CAT10251PXX
Power supply serial number : DCA10192KXX
Model revision number : D0
Motherboard revision number : A0
Model number : WS-C3560-24PS-S
System serial number : CAT1025XX
Top Assembly Part Number : 800-261XX-02
Top Assembly Revision Number : C0
Version ID : V02
CLEI Code Number : COMMGXXXRB
Hardware Board Revision Number : 0x01
Switch Ports Model SW Version SW Image
------ ----- ----- ---------- ----------
* 1 26 WS-C3560-24PS 12.2(44)SEB4 C3560-IPBASE-M
Configuration register is 0xF
SHOW POST OUTPUT
Switch#sh post
Stored system POST messages:
Switch 1
---------
POST: CPU MIC register Tests : Begin
POST: CPU MIC register Tests : End, Status Passed
POST: PortASIC Memory Tests : Begin
POST: PortASIC Memory Tests : End, Status Passed
POST: CPU MIC PortASIC interface Loopback Tests : Begin
POST: CPU MIC PortASIC interface Loopback Tests : End, Status Passed
POST: PortASIC RingLoopback Tests : Begin
POST: PortASIC RingLoopback Tests : End, Status Passed
POST: PortASIC CAM Subsystem Tests : Begin
POST: PortASIC CAM Subsystem Tests : End, Status Passed
POST: PortASIC Port Loopback Tests : Begin
POST: PortASIC Port Loopback Tests : End, Status Passed
Switch#