Major Features:
LCD large-screen display, 320*240 lattice, backlight, LED indicator. |
Hand held, auto configuration. |
Multi-task operation at one time. |
Store 20 test results and 9 test configurations, with power-off memories. |
C operation, store, analysis, print. |
Programmable timer. |
Alarm and histogram analysis Software updating. |
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Major Functions:
For 2Mbit/s. |
Service-interrupted error testing. |
Online error testing. |
Framed and unframed signals generation and reception. |
2Mbit/s unframed error performance testing. |
2Mbit/s framed N*64kbit/s channel error testing. |
Bit error, coding error, frame error, CRC error and E bit error testing. |
Signal loss alarm, AIS alarm, framed remote alarm, multi-framed remote alarm, out-of-frame, and pattern loss alarm. |
Frequency offset testing. |
Line signal level and frequency testing. |
Voice channel signal level and frequency testing. |
Pattern slip testing. |
Clock slip testing. |
Straightforward signaling. |
Audio frequency testing. |
Loop circuit delay testing. |
Automatic protection switching time testing (APS). |
Clock bias function. |
Sound monitoring. |
Duplex 2Mbit/s detecting and monitoring. |
Signal state display. Voice channel content display. Voice channel busy indication. |
Alarm and error histogram analysis. |
Time slot content analysis, drop and insert signal on each time slot. |
Framed content analysis. |
G.703 module analysis. |
G. 821/G. 826/M. 2100 error analysis. |
Multi error and alarm inserting. |
Three input modes (terminating, bridging and monitoring). |
Three clock options (internal, external and picking-up). |
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For Datacom:
V.24/RS232/V.28, V.35, V.36, X.21, RS-449, RS-485, RS422, EIA-530, EIA-530A datacom testing. |
SYNCH and ASYNCH testing. |
DTE and DCE emulation. |
Bit code testing. |
Pattern slip testing. |
Signal loss alarm. |
Line signal level and frequency testing. |
Loop delay testing. |
Automatic protection switching time testing(APS). |
G.821, M2100 service interrupt error testing. |
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For co-directional 64Kbit/s:
Service interrupt error testing. |
Bit code testing. |
Pattern slip testing. |
Signal loss, AIS alarm. |
Line signal frequency testing. |
Loop delay testing. |
Automatic protection switching time testing(APS). |
G.821, M.2100 error testing. |
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Technical Index:
2M Technical Index. |
(1) Signal input rate: 2048kbit/s+100ppm(G.703 requirement+50PPM). |
(2) Signal coding: HDB3, AMI. |
(3) Input jitter tolerance: Up to the requirement of Figure 10.1. |
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(4) Input balance response: Attenuation complies with the law of square root of frequency, and is within the range of 0 to 6dB at 1024 kHz. |
(5) Input Impedance. |
(5.1) Unbalance terminating: 75Ω. |
Balance terminating: 120Ω. |
Reflection loss >18dB within 50Hz ~3100kHz. |
(5.2) Unbalance bridging: >750ΩW. |
Balance bridging: >1200Ω. |
(5.3) Unbalance monitoring: 75Ω,26dB gain. |
Balance monitoring: 120Ω , 26dB gain. |
Reflection loss >18dB within 50Hz??3100kHz. |
(6) Signal structure. |
(6.1) Non-frame structure. |
(6.2) Frame structure: PCM30, PCM31, PCM30CRC, PCM31CRC. |
Frame structure complies with the requirement of G. 704. |
(7) Testing pattern: 26-1??29-1??211-1??215-1??220-1??223-1, and artificial code. |
(8) Impedance of output interface. |
(8.1) Non-balance 75Ω, up to G. 703. |
(8.2) Balance 120Ω, up to G. 703. |
(9) External clock input. |
(9.1) Signal form: HDB3, NRZ. |
(9.2) Balance terminating resistance: 120Ω. |
Unbalance terminating resistance: 75Ω. |
Balance bridging resistance: >1200Ω. |
Unbalance bridging resistance: >750Ω. |
(10) Error code insertion: None, single, or ratio 10-1 ~ 10-7. |
Co-directional 64k Technical Index. |
(1) Signal input rate: 64 kbit/s+100ppm(G.703 requirement+100PPM). |
(2) Input impedance: Balance 120 Ω, up to G.703. |
(3) Input jitter tolerance: Up to G.823. |
(4) Impedance of output interface: Balance 120Ω, up to G.703. |
(5) Testing pattern:26-1??29-1??211-1??215-1??220-1??223-1, and artificial code. |
Input Impedance. |
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Datacom Index:
(1) Data interface type: V.24, V.35, V.36, X.21, RS-449, RS-485, EIA-530 and EIA-530A. |
(2) Generator. |
(2.1) SYNCH mode. |
Clock source: Internal or external clock. |
Phase relation between clock and data: co-direction or reverse direction. |
Rate: 1.2, 2.4, 4.8, 9.6, 14.4, 19.2, 38.4, 48, 56(kbps), N*64kbps(N=1~32). |
Error: +15ppm(ppm: parts per million). |
(2.2) ASYNCH mode. |
Rate: 50,75,110,150,200,300,600,1200,2400,3600,4800,7200,9600,14.4k,19.2k,38.4k,57.6k(bps). |
Data structure: Word length: 5,6,7,8(bits), Stop bit: 1,2(bits). |
Odd-even check: odd, even, 1, 0, none. |
(2.3) Error code insertion: None, single, or ratio 10-1 ~ 10-7. |
(3) Receiver. |
(3.1) SYNCH mode. |
Clock source: Internal or external clock. |
Phase relation between receive clock and receive data: Equidirection or reverse direction. |
Clock Rate: 2048kbps at a maximum. |
(3.2) ASYNCH mode. |
The rate and data are the same as those of the generator. |
(4) Testing pattern: 26-1??29-1??211-1??215-1??220-1??223-1, and artificial code. |
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Other Parameters:
Power supply. |
(1) Special power adapter. |
Input: AC220V 50Hz. |
Output: DC 9V 1A. |
(2) Internal rechargeable battery. |
4000mAh, 6V nickel-hydrogen rechargeable battery. |
Working time: 8 hours. |
Charging: 8 hours at power-off state, and 12 hours at power-on state. |
Dimension and weight. |
L*W*H: 200*160*42mm. |
Weight: 950g. |
Ambient parameters. |
Operation temperature: 0~40oC? ?. |
Storage Temperature: -30~+70oC. |
Humidity: 5%~90%, non-condensing. |
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RY1200 series 2M/Datacom Transmission Analyzer Table:
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