Cover
Low Power Digital Design using Asynchronous Logic
Moving towards clock-less design
Taschenbuch von Sathish Vimalraj Antony Jayasekar
Details
  • Autor: Sathish Vimalraj Antony Jayasekar
  • EAN: 9783846518441
  • Einband: Kartoniert / Broschiert
  • Inhalt: 92 S.
  • Ausstattung / Beilage: Paperback
  • Sprache: Englisch
  • Seiten: 92
  • Maße: 220 x 150 x 6 mm
  • Erschienen: 10.10.2011
  • Schlagworte: Hardware / Computerhardware / Informatik / EDV
Beschreibung
The need for low power design is motivated by several factors, such as the emergence of portable systems, thermal considerations, reliability issues, and, most importantly, environmental concerns. Lots of power is wasted in an electronic device when the system is idle. This book introduces a new method of achieving low power by reducing the dependency of the clock signal in the design. It mainly focuses on obtaining low power by implementing asynchronous logic.
Kurzbeschreibung
Titel: Low Power Digital Design using Asynchronous Logic | Zusatz: Moving towards clock-less design | Medium: Taschenbuch | Autor: Sathish Vimalraj Antony Jayasekar | Einband: Kartoniert / Broschiert | Inhalt: 92 S. | Ausstattung / Beilage: Paperback | Sprache: Englisch | Seiten: 92 | Maße: 220 x 150 x 6 mm | Erschienen: 10.10.2011 | Anbieter: Buchbär