One rare MIPS (FPU) Floating Point Unit wafer for sale. This early one has a large die size. Later versions were fabricated with much smaller dies.  

Designed as a co-processor for the R3000/R3000A CPUs the R3010  monitors system bus, and when it encounters floating-point instruction it loads it into 6-stage pipeline, where the instruction is decoded and executed.
For instruction execution the FPU utilizes three calculation units: Addition/Subtraction, Multiplication and Division. Operations in these units can be performed concurrently, which allows the co-processor
to execute up to three different instructions at the same time.

Colors will change dramatically depending on viewing angle and lighting conditions. Photos were taken with flash or under standard incandescent room light. Photomicrographs were made using halogen lights.  

I've got a wide selection of other wafers in my store.