Autore: Swapan Kumar Samaddar,Debashis Chowdhury,Amitabha Sinha
Formato: Copertina flessibile
Pagine: 136
Data Pubblicazione: 2013-05-24
Edizione: 1
Lingua: English
Descrizione:
The paper describes a new architecture for implementation of 8 X 8 FDCT (Fast Discrete Cosine Transform) using Distributed Arithmetic (DA). This proposed architecture combines both DA based approaches for distributed input vector and constant coefficients. The described Combined Distributed Arithmetic based DCT (CDADCT) architecture has been implemented on Virtex II FPGA, and shows fewer adders and saving exceeding 97% achieved.