Before purchasing, please contact me to double check compatibility. 

Micron 2x8GB (16GB Total) PC2-5300F-555-12-ZZ (model MT72HTS1G72FZ-667H1D6)

Datasheet: https://media.digikey.com/pdf/Data%20Sheets/Micron%20Technology%20Inc%20PDFs/MT72HTS1G72FZ-80E_-667_ds.pdf

This memory has been fully tested with MemTest86 and found to be in perfectly working condition. Please see memory report below.

It comes from a smoke free and pet free home. 

You'll receive the exact memory shown so please check the pictures for more information. 

The memory will be placed in an antistatic bag and safely packaged prior to shipping to protect it during transit.

Standard shipping in the USA is free and includes a tracking number.

Please check my feedback and bid with confidence 

Thank you for looking!

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Manufacturing Description
Module Manufacturer:Micron Technology
Module Part Number:72HTS1G72FZ667H1D6
DRAM Manufacturer:Micron Technology
DRAM Components:Not determined
DRAM Die Revision / Process Node:H / 50 nm
AMB Manufacturer:Trident Microsystems
Module Manufacturing Date:Week 26, 2012
Manufacturing Date Decoded:June 25-29, 2012
Module Serial Number:DD9F9208h
Module Manufacturing Location:Singapore (SING)
Module PCB Revision:1
Physical & Logical Attributes
Fundamental Memory Class:DDR2 SDRAM FB-DIMM
Module Speed Grade:DDR2-667D
Module Capacity:8192 MB
Module Thickness (mm):7.0 < x <= 8.0
Module Height (mm):30 < x <= 35
Module Type:FB-DIMM (133.35 mm)
Number of DIMM Ranks:4
Number of Column Addresses:11 bits
Number of Row Addresses:14 bits
Number of Bank Addresses:3 bit (8 banks)
DRAM Device Width:4 bit
Calculated DRAM Capacity:1 Gb
DRAM Density:1 Gb
Number of DRAM components:64
DRAM Page Size:1 KB
Channel Interface Power Supply:1.5 V
DRAM Interface Power Supply:1.8 V
DRAM Timing Parameters
Fine Timebase Divisor:1 ps
Fine Timebase Dividend:5 ps
Medium Timebase Dividend:1 ns
Medium Timebase Divisor:4 ns
Minimum Clock Cycle Time (tCK min):3.00 ns (333.33 MHz)
Maximum Clock Cycle Time (tCK max):8.00 ns (125.00 MHz)
Minimum CAS# Latency Time (tAA min):15.00 ns
Burst Lengths Supported:4, 8
CAS# Latencies Supported (tCL):3T, 4T, 5T
Minimum RAS# to CAS# Delay Time (tRCD):15.00 ns
Minimum Row Active to Row Active Delay (tRRD):7.50 ns
Minimum Row Precharge Delay Time (tRP):15.00 ns
Minimum Active to Precharge Delay Time (tRAS):45.00 ns
Minimum Act to Act/Refresh Delay Time (tRC):55.00 ns
Minimum Refresh Recovery Delay Time (tRFC):127.50 ns
Minimum Write Recovery Time (tWR):16.50 ns
Write Recovery Times Supported:2T, 3T, 4T, 5T
Write Latencies Supported:2T, 3T, 4T, 5T, 6T, 7T, 8T, 9T
Additive Latencies Supported:0T, 1T, 2T, 3T, 4T, 5T
Minimum Write to Read Command Delay (tWTR):7.50 ns
Minimum Read to Precharge Command Delay (tRTP):7.50 ns
Average Refresh Interval (tREFI):7.80 ns
Rank Read-to-Read additional clocks:0T
Write-to-Read additional clocks:0T
Read-to-Write additional clocks:1T
Terminations Supported (150/75/50Ohm):Yes, Yes, Yes
Rank 0 ODT Definition:150 Ohm
Rank 1 ODT Definition:150 Ohm
Weak Driver:Supported
Thermal Parameters
DRAM Case Temperature Rise from Ambient
DT0: due to Activate-Precharge0.30 °C
DT2N/DT2Q: due to Precharge/Quiet Standby1.50 °C
DT2P: due to Precharge Power-Down0.150 °C
DT3N: due to Active Standby1.65 °C
DT4R/DT4R4W: due to Page Open Burst Read4.80 °C
DT5B: due to Burst Refresh9.00 °C
DT7: due to Bank Interleave Reads with Auto-Precharge10.50 °C
AMB Case Temperature Rise from Ambient
DT AMB Idle_0: due to AMB in Idle_0 State58.0 °C
DT AMB Idle_1: due to AMB in Idle_1 State71.0 °C
DT AMB Idle_2: due to AMB in Idle_2 State58.0 °C
DT AMB Active_1: due to AMB in Active_1 State95.0 °C
DT AMB Active_2: due to AMB in Active_2 State79.0 °C
DT AMB L0s: due to AMB in L0s StateNot supported
Thermal Resistance
Psi[T-A DRAM]: DRAM Package from Top (Case) to Ambient24.5 °C/W
Psi[T-A AMB]: AMB Package from Top (Junction) to Ambient21.0 °C/W
Maximum Temperatures
DRAM Case Temperature Maximum95 °C
AMB Junction Temperature Maximum125 °C
Thermal Requirements
DT4R4W Delta0.40 °C
DRAM High Temperature Self-Refresh EntrySupported
Double Refresh Rate at DRAM TCaseMax > 85°CRequired
SPD Protocol
SPD Revision:1.2
SPD Bytes Total:256
SPD Bytes Used:176
SPD Checksum:6865h (OK)
CRC covers bytes:0-116
Part number details
Classification:DDR2 FB-DIMM
Module Type:FB-DIMM
Module Speed:DDR2-667 5-5-5
Die Revision:H
PCB Revision:1
Package Type:DDP
FrequencyCASRCDRPRASRCRFCRRDWRWTRRTP
333 MHz 5551519433633
267 MHz 4441215342522
200 MHz 333911262422