Description:

The CD40192B Presettable BCD Up/Down Counter and the CD40193B Presettable Binary Up/Down Counter each consist of 4 synchronously clocked, gated "D" type flip-flops connected as a counter. The inputs consist of 4 individual jam lines, a PRESET\ ENABLE\ control, individual CLOCK UP and CLOCK DOWN signals and a master RESET. Four buffered Q signal outputs as well as CARRY\ and BORROW\ outputs for multiple-stage counting schemes are provided.

The counter is cleared so that all outputs are in a low state by a high on the RESET line. A RESET is accomplished asynchronously with the clock. Each output is individually programmable asynchronously with the clock to the level on the corresponding jam input when the PRESET\ ENABLE\ control is low.

The counter counts up one count on the positive clock edge of the CLOCK UP signal provided the CLOCK DOWN line is high. The counter counts down on count on the positive clock edge of the CLOCK DOWN signal provided the CLOCK UP line is high.

The CARRY\ and BORROW\ signals are high with the counter is counting up or down. The CARRY\ signal goes low one-half clock cycle after the counter reaches its maximum count in the count-up mode. The BORROW\ signal goes low one-half clock cycle after the counter reaches its minimum count in the count-down mode. Cascading of multiple packages is easily accomplished with out the need for additional external circuitry by tying the BORROW\ and CARRY\ outputs to the CLOCK DOWN and CLOCK UP inputs, respectively, of the succeeding counter package.

Included:

• 10 x CD40192BE

This item features:

• Individual clock lines for counting up or counting down
• Synchronous high-speed carry and borrow propagation delays for cascading
• Asynchronous reset and preset capability
• Medium-speed operation–fCL = 8MHz (typ.) @ 10 V
• 5-V, 10-V, and 15-V parametric ratings
• Standardized, symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (full package-temperature range) =
          1 V at VDD = 5 V
          2 V at VDD = 10 V 
       2.5 V at VDD = 15 V
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
• Applications: 
  • Up/down difference counting
  • Multistage ripple counting
  • Synchronous frequency dividers
  • A/D and D/A conversion
  • Programmable binary or BCD counting

• New and Authentic Component(s) - Texas Instruments CD40192BE CMOS Presettable BCD Up/Down Counter (Dual Clock with Reset) IC.
• Friendly Note: Be mindful of the many, inexpensive, counterfeits available on the market.

Shipping and general details:

• Shipping is free in the United States and shipped via USPS First Class.
• We do our best to offer you great pricing.
• Orders are packaged in custom-cut (dependent on quantity of chips ordered) anti-static tubes, providing excellent ESD protection.
• 30-Day Return Policy.
• We are expanding on a daily basis. If you do not see the part, or quantity of the part, you are looking for, please, let us know. We will do our best to accommodate you.