The IDT7200/7201/7202 are dual-port memories that load and empty data
on a first-in/first-out basis. The devices use Full and Empty flags to prevent data
overflow and underflow and expansion logic to allow for unlimited expansion
capability in both word size and depth.
The reads and writes are internally sequential through the use of ring
pointers, with no address information required to load and unload data. Data
is toggled in and out of the devices through the use of the Write (W) and Read
(R) pins.
The devices utilize a 9-bit wide data array to allow for control and parity bits
at the user’s option. This feature is especially useful in data communications
applications where it is necessary to use a parity bit for transmission/reception
error checking. It also features a Retransmit (RT) capability that allows for reset
of the read pointer to its initial position when RT is pulsed LOW to allow for
retransmission from the beginning of data. A Half-Full Flag is available in the
single device mode and width expansion modes.
These FIFOs are fabricated using IDT’s high-speed CMOS technology.
They are designed for those applications requiring asynchronous and
simultaneous read/writes in multiprocessing and rate buffer applications.
Military grade product is manufactured in compliance with the latest revision of
MIL-STD-883, Class B.