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1.3 Inch TFT LCD Screen Display Module IPS 240x240 SPI Parallel Interface ST7789 with Box

Spliced Type

Welded Type
2 FEATURES
Single chip TFT-LCD Controller/Driver with On-chip Frame Memory (FM)
Display Resolution: 240*RGB (H) *320(V)
Frame Memory Size: 240 x 320 x 18-bit = 1,382,400 bits
LCD Driver Output Circuits
- Source Outputs: 240 RGB Channels
- Gate Outputs: 320 Channels
- Common Electrode Output
Display Colors (Color Mode)
- Full Color: 262K, RGB=(666) max., Idle Mode Off
- Color Reduce: 8-color, RGB=(111), Idle Mode On
Programmable Pixel Color Format (Color Depth) for Various Display Data input Format
- 12-bit/pixel: RGB=(444)
- 16-bit/pixel: RGB=(565)
- 18-bit/pixel: RGB=(666)
Display Interface
- Parallel 8080-series MCU Interface (8-bit, 9-bit)
- 6-bit RGB Interface(VSYNC, HSYNC, DOTCLK, ENABLE, DB[5:0])
- Serial Peripheral Interface(SPI Interface)
- VSYNC Interface
Display Features
- Programmable Partial Display Duty
- CABC for saving current consumption
- Color enhancement
On Chip Build-In Circuits
- DC/DC Converter
- Adjustable VCOM Generation
- Non-Volatile (NV) Memory to Store Initial Register Setting and Factory Default Value (Module ID,
Module Version, etc)
- Timing Controller
- 4 preset Gamma curve with separated RGB Gamma setting
- Internal VPP for NV Memory
Build-In NV Memory for LCD Initial Register Setting
- 8-bits for ID1 setting
- 8-bits for ID2 setting
- 8-bits for ID3 setting
- 6-bits for VCOM Offset adjustment
Driving Algorithm
- Dot Inversion
- Column Inversion
Wide Supply Voltage Range
- I/O Voltage (VDDI to DGND): 1.65V ~ 3.3V (VDDI≦ VDD)
- Analog Voltage (VDD to AGND): 2.4V ~ 3.3V
On-Chip Power System
- Source Voltage (VAP (GVDD) to VAN (GVCL)): +6.4~-4.6V
- VCOM level: GND
- Gate driver HIGH level (VGH to AGND): +12.2V ~ +14.97V
- Gate driver LOW level (VGL to AGND): -12.5V ~ -7.16V
- Adjustable voltage range for feed through compensation: 0.1V~1.675V
Optimized layout for COG Assembly
Operate temperature range: −30℃ to +85℃  Lower Power Consumption